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Showing posts with label Supercomputer. Show all posts
Showing posts with label Supercomputer. Show all posts

New Technology Update : Computer Chips Engineers Use Disorder To Ccontrol Light On The Nanoscale

A breakthrough by a team of researchers from UCLA, Columbia University and other institutions could lead to the more precise transfer of information in computer chips, as well as new types of optical materials for light emission and lasers.

The researchers were able to control light at tiny lengths around 500 nanometers -- smaller than the light's own wavelength -- by using random crystal lattice structures to counteract light diffraction. The discovery could begin a new phase in laser collimation -- the science of keeping lasers precise and narrow instead of spreading out.
The study's principal investigator was Chee Wei Wong, associate professor of electrical engineering at the UCLA Henry Samueli School of Engineering and Applied Science.

Think of shining a flashlight against a wall. As the light moves from the flashlight and approaches the wall, it spreads out, a phenomenon called diffraction. The farther away the light source is held from the wall, the more the beam diffracts before it reaches the wall.

The same phenomenon also happens on a scale so small that distances are measured in nanometers -- a unit equal to one-billionth of a meter. For example, light could be used to carry information in computer chips and optical fibers. But when diffraction occurs, the transfer of data isn't as clean or precise as it could be.

Technology that prevents diffraction and more precisely controls the light used to transfer data could therefore lead to advances in optical communications, which would enable optical signal processing to overcome physical limitations in current electronics and could enable engineers to create improved optical fibers for use in biomedicine.

To control light on the nanoscale, the researchers used a photonic crystal superlattice, a lattice structure made of crystals that allows light through. The lattice was a disorderly pattern, with thousands of nanoscale heptagonal, square and triangular holes. These holes, each smaller than the wavelength of the light traveling through the structure, serve as guideposts for a beam of light.

Engineers had understood previously that uniformly patterned holes can control the spatial diffraction somewhat. But the researchers found in the new study that the structures with the most disorderly patterns were best able to trap and collimate the beam into a narrow path, and that the structure worked over a broad part of the infrared spectrum.

The study's lead author was Pin-Chun Hsieh, who was advised by Wong during his doctoral studies at Columbia University's Fu Foundation School of Engineering and Applied Science.

The effect of disorder, known as Anderson localization, was first proposed in 1958 by Nobel laureate Philip Anderson. It is the physical phenomenon that explains the conductance of electrons and waves in condensed matter physics.

The new study was the first to examine transverse Anderson localization in a chip-scale photonic crystal media. It was published online today by Nature Physics.

"This study allows us to validate the theory of Anderson localization in chip-scale photonics, through engineered randomness in an otherwise periodic structure," Wong said. "What Pin-Chun has observed provides a new path in controlling light propagation at the wavelength scale, that is, delivering structure arising out of randomness."

Hsieh, who also is chairman and majority owner of Taiwan-based Quantumstone Research, said the findings are completely counterintuitive because one might think that disorder in the structures would lead the light to spread out more. "This effect, based on intuition gained from electronic systems, where introduced impurities can turn an insulator into a semiconductor, shows unequivocally that controlling disorder can arrest transverse transport, and really reduce the spreading of light."

The numerical simulation was performed at University College London, and the sample fabrication was carried out at the Brookhaven National Laboratory in New York and at National Cheng Kung University in Taiwan.

The research was supported primarily by a grant from the U.S. Office of Naval Research. Additional support was provided by the National Science Foundation, the Department of Energy and the government of the United Kingdom. Hsieh is supported by a scholarship from Taiwan's Department of Education

Web News : India's Fastest Supercomputer Param Yuva-II Launched

Ushering a second of pleasure for the country, J. Satyanarayana, Assistant, Division of Gadgets and Information Technological innovation (DeitY), Govt of Native indian, released PARAM Yuva - II, the new 500 TeraFlop edition of its previously PARAM Yuva at C-DAC Pune, last night.

With the release of PARAM Yuva –II, C-DAC has taken a huge leap towards creating a common objective research-oriented computational atmosphere. This program is designed to fix large and complicated computational problems. This will provide an opportunity for new medical efforts for the analysis group. By making use of multiple technology, the increase in optimum estimate energy from 54 Teraflop/s to 524 Teraflop/s has been obtained without any significant change in the electric energy absorbed by the service.

The program obtained a continual performance of 360.8 Teraflop/s on Community conventional Linpack conventional. In evaluation to Nov 2012 Record of Globe's Top 500 supercomputers, PARAM Yuva – II would have was standing at 62nd globe and at number 1 place in the country. With regards to performance, it is better than most supercomputing systems and would have obtained 33rd place in the Nov 2012 Record of Top Green 500 supercomputers around the globe. 
Satyanarayana devoted the new and highly effective supercomputer to the Great Performance Processing (HPC) customer group in the country. The release of PARAM Yuva II was performed as part of the Class on Nationwide Objective on Supercomputing being organized by C-DAC, Pune.

Speaking on the event of the release, Satyanarayana accented C-DAC for accomplishing the 500 TF estimate energy and reiterated the assistance of the Native indian government to “establish India’s place as the main location for innovative R&D across the international scenery. While the Native indian IT industry has always been at the top, the characteristics of the market especially in the light of financial meltdowns power us to take a relook at balancing our main concerns. Advanced R&D in growing areas can be a major interest place for Native indian as countries battle to find practical alternatives within financial restrictions. Computational features and qualified human resources will be the initial pre-requisites to take the effort ahead. The Govt of Native indian has always been in assistance of the R&D group and with organizations like C-DAC major the way ahead, the future certainly looks shiny for the country.”

PARAM Yuva – II provides more than half a Petaflop of raw estimate energy using multiple estimate technology with estimate co-processor and components accelerators. The network system consists of home PARAMNet-III and Infiniband FDR System Area Network. PARAM Yuva –II has 200 Terabytes of high performance storage space and assistance software for similar computing.

Addressing the press, Prof Rajat Moona, Home General, C-DAC, indicated his pleasure and pleasure "to be able to provide India’s first 500 TF supercomputer through C-DAC. Way back in 1991, C-DAC had efficiently designed, designed and released the first ever supercomputer in Native indian. Over the following years, C-DAC has combined its abilities in the supercomputing field to be able to multiply its key benefits to the medical group in the form of national supercomputing features. C-DAC has also set the precedent by creating the first Gigascale and first Terascale program in the country. C-DAC is devoted to develop supercomputing technology and programs further together with various organizations in Native indian and overseas.”

With this release, C-DAC also becomes the first R&D organization in Native indian to mix the 500 TF landmark.

Also present on the event were Prof. N. Balakrishnan, Affiliate Home, IISc, Prof Rajat Moona, Home General, C-DAC, Dr Pradeep K Sinha, Sr Home (HPC), Dr Hemant Darbari, Professional Home, C-DAC, Pune, Dr Sarat C Babu, Professional Home, C-DAC, Bengaluru and other mature authorities from R&D organizations across the country.
 
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